Page structure (layout) analysis

Page structure (layout) analysis The most convenient tool for page layout analysis and assignment is a Bitmap viewer in couple with Structure viewer. The analysis of page layout is based on pattern analysis and their borders recognition within the dump of memory chip. Data area 512 bytes – used in old chips where controllers didn’t…

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ECC in NAND flash memory

ECC in NAND flash memory The modern flash devices have a very common problem of data integrity caused by low quality of NAND chips. This problem is well known as “Bit errors”. When bit errors appear on the area where file is stored, it gets corrupted and unreadable. It’s very noticeable on multimedia files. There…

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NAND Bad Columns analysis and removal

NAND Bad Columns analysis and removal These vertical stripes are Bad Columns. Number of Bad columns within one page can be any, on practise 1…80 defects/columns (2…160 bytes per page). Typical size of bad columns is 2 bytes, rarely 1 byte, sometimes they are grouped together as 4,6 and more bytes. A distrubution of bad…

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XOR (Scrambler) key extraction

XOR (Scrambler) key extraction Author: Chris Sampson, TRC Data Recovery Using Visual Nand Reconstructor, we are able to identify and extract new or unidentified Xor scrambler patterns in a (normally) relatively straight forward way. We do this using a little knowledge of the flash memory chip architecture which we then combine with the bitmap viewer…

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Binary patterns in NAND Flash memory

Binary patterns in NAND Flash memory The Physical image of NAND contains following recognizable patterns Data area patterns Scrambled (XORed) data area patterns Spare area patterns ECC patterns Bit error patterns Bad Columns patterns Other patterns Data area   The Data has quiet high density (entropy) and has horizontal patterns that look like stripes, cubes,…

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Scrambler pattern (XOR key) visual recognition

Scrambler (XOR key) pattern visual recognition AU6990 / ITE1171 / PS3016-P7-T / FC8708-C / PS2251-33BA / ITE1167BFN-46A / IT1165E-48B / PS2251-33BB-E Pattern (XOR key) period: 128/256/258 pages Page size: 8kb Visually looks like diagonals. Controller generates one page of pattern for first page in block, then cyclically shift it -1 byte (-8 bits) for next…

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Analysis of bit errors in NAND and power adjustment

Analysis of bit errors in NAND and power adjustment During the NAND chip reading process (physical image extraction) there are internal noise and interference occur, that results to bit errors and data corruption. This problem is particularly critical for TLC flash chips. If physical image extracted with high number of bit errors, the correction through…

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